Memory Interface | Interrupts

Memory Interface
  1. Compare the memory mapped I/O with peripheral mapped I/O.
  2. Interface the following memory to 8085:
3.     ROM : 2Kx 8-bit, using 2716, starting address : 0000h
4.     RAM : 2Kx 8-bit, using 6116, starting address : 8000h
5.     Use absolute address decoding. Show all the control signals interfacing.
  1. Design a microcomputer to obtain the following: 4K EPROM, 512 bytes static RAM, four 8-bit ports. using
    1. Standard I/O and linear decoding.
    2. Full decoding using 3×8 decoder.
    3. Memory mapped I/O and full decoding.
  1. Interface two input ports at addresses FFFOh and FFF1h and two output ports at addresses 9000h and 9001h using memory mapped I/O. Indicate the assumptions made if any.
  2. Interface 8K bytes of EPROM & 4K bytes of RAM, 8 I/P devices, 8 O/P devices to a 8085 system in I/O mapped I/O. the memories are provided in 2K bytes ICs. Give the schematic diagram with address data bus demultiplexing, indicate the decoding logic & the address space for each.
  3. Differentiate between partial decoding and absolute decoding in case of device (memory I/O) selection. Give an example.
  4. Interface 8K byte RAM and 4K byte EPROM to 8085, by absolute decoding using 74LS138 decoder. Give the memory map starting at address 0000h for EPROM.
  5. Explain: i) memory mapped I/O, ii) I/O mapped or standard I/O, iii) serial I/O.
 Interrupts
  1. Explain in detail the interrupt system of 8085.
  2. Design and explain a scheme to interrupt on INTR of 8085.
  3. Indicate all the pins of 8085 through which the processor can be interrupted. In respect of each of these pins describe how the processor obtains the starting address of the interrupt service routine.
  4. What is meant by priority interrupts? Explain the operation of different interrupts available in 8085, with the help of circuit diagram.
  5. How is the device priority determined in hardware polling? Explain.
  6. Distinguish between: i) Vectored and non vectored interrupt, ii) Maskable and non maskable interrupt, iii) Internal and external interrupt, iv) Software and hardware interrupt.
  7. Explain interrupt driven I/O technique. How 8085 responds to INTR interrupt?

About hombarpakpahan

student
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